✨ About The Role
- This role involves developing and supporting design automation flows for ASIC products and associated IPs.
- Responsibilities include conducting design reviews, creating documentation, and assisting with IP integration into SOCs.
- The position requires regression testing of flows and verification checks to ensure quality and reliability.
- The candidate will be involved in physical verification runset support and development.
- Integration of flows and checks into design cockpits is a key aspect of the job.
âš¡ Requirements
- The ideal candidate will have a strong background in IP and ASIC design methodologies.
- Experience with design automation using Cadence Virtuoso for Analog and Mixed-Signal IP development is essential.
- Proficiency in various programming and scripting languages such as Shell Scripting, PERL, RUBY, TCL, and C/C++ is required.
- Familiarity with advanced semiconductor process technologies, particularly 3nm, 5nm, and 7nm, is a plus.
- The candidate should possess excellent communication skills to present complex technical information to both experts and non-experts.