✨ About The Role
- The role involves conducting detailed studies of chip architecture and micro-architecture to validate switch features during both emulation and post-silicon phases.
- The engineer will develop system-level tests using various programming languages to verify networking switch chips and systems.
- Responsibilities include synthesizing Verilog RTL and building models for emulation platforms.
- The position requires debugging expertise to address pre/post-silicon issues effectively.
- The engineer will also develop and optimize automation scripts and methodologies to enhance efficiency in the validation process.
âš¡ Requirements
- The ideal candidate will have a strong background in chip architecture and micro-architecture, with the ability to conduct detailed studies and develop comprehensive test plans.
- Proficiency in programming languages such as Tcl, ITcl, Python, and C/C++ is essential for developing system-level tests.
- Experience with emulation platforms like Zebu or Palladium is crucial for synthesizing Verilog RTL and building models.
- Strong debugging skills are necessary to perform chip/system-level debugging and root cause analysis for hardware and software issues.
- The candidate should be adept at creating reusable synthesizable design blocks and verification components to streamline emulation processes.