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Senior Physical Design Engineer (icb4)
Design and implement high-speed physical layouts for advanced 3nm networking ASICs.
Remote
Senior
$119,000 - 190,000 USD / year
1 month ago
✨ About The Role
- The Senior Physical Design Engineer will be responsible for high-speed physical designs at the 3nm technology node.
- Key responsibilities include floorplanning, physical implementation of blocks and top-level designs, and clock-tree synthesis.
- The role involves physical verification and timing closure for both block and chip-level designs.
- Candidates will conduct static and dynamic IR drop analysis, as well as signal and power EM checks.
- Methodology and flow development for physical design and timing closure will be part of the job.
- The engineer will collaborate with internal and external teams, including Design, IP, and Library teams.
- Experience with TCL and Perl for productivity enhancement is desired.
âš¡ Requirements
- The ideal candidate should have a strong background in deep-sub-micron IC physical designs with at least 8 years of experience for a BE or 6 years for an ME.
- Proficiency in floor-planning, partitioning, placement, clock tree synthesis, routing, and physical verification is essential.
- Candidates should possess excellent problem-solving skills to effectively address congestion resolution and timing closure challenges.
- Experience with formal verification, timing analysis, and ECO implementation is highly desirable.
- The ability to work independently while also supporting team members is crucial for success in this role.
- Strong communication skills are necessary to interface with internal and external teams effectively.
- Familiarity with tools such as Innovus, Calibre, LEC, and PrimeTime is highly preferred.
Senior Physical Design Engineer (icb4)
Remote
$119,000 - 190,000 USD / year
Engineering
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